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  ? semiconductor components industries, llc, 2005 june, 2005 ? rev. 9 1 publication order number: MC74HC157A/d MC74HC157A quad 2?input data selectors / multiplexers high?performance silicon?gate cmos the MC74HC157A is identical in pinout to the ls157. the device inputs are compatible with standard cmos outputs; with pullup resistors, they are compatible with lsttl outputs. this device routes 2 nibbles (a or b) to a single port (y) as determined by the select input. the data is presented at the outputs in noninverted form. a high level on the output enable input sets all four y outputs to a low level. features ? output drive capability: 10 lsttl loads ? outputs directly interface to cmos, nmos, and ttl ? operating voltage range: 2.0 to 6.0 v ? low input current: 1.0  a ? high noise immunity characteristic of cmos devices ? in compliance with the requirements defined by jedec standard no. 7a ? chip complexity: 82 fets or 20.5 equivalent gates ? pb?free packages are available* *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. http://onsemi.com marking diagrams soic?16 d suffix case 751b tssop?16 dt suffix case 948f 1 16 pdip?16 n suffix case 648 1 16 1 16 1 16 MC74HC157An awlyywwg 1 16 hc157ag awlyww hc 157a alyw   1 16 a = assembly location l, wl = wafer lot y, yy = year w, ww = work week g = pb?free package  = pb?free package (note: microdot may be in either location) see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information 1 16 74hc157a alywg soeiaj?16 f suffix case 966 1 16
MC74HC157A http://onsemi.com 2 2 5 11 14 3 6 10 13 4 7 9 12 1 15 a0 a1 a2 a3 b0 b1 b2 b3 y0 y1 y2 y3 select output enable data outputs nibble a inputs nibble b inputs pin 16 = v cc pin 8 = gnd function table inputs output outputs enable select y0 ? y3 x = don?t care a0 ? a3, b0 ? b3 = the levels of the respective data?word inputs. h l l x l h l a0 ?a3 b0 ?b3 figure 1. pin assignment 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 select y0 b0 a0 y1 b1 a1 gnd y3 b3 a3 output enable v cc b2 a2 y2 figure 2. logic diagram ordering information device package shipping ? MC74HC157An pdip?16 500 units / rail MC74HC157Ang pdip?16 (pb?free) 500 units / rail MC74HC157Ad soic?16 48 units / rail MC74HC157Adg soic?16 (pb?free) 48 units / rail MC74HC157Adr2 soic?16 2500 units / reel MC74HC157Adr2g soic?16 (pb?free) 2500 units / reel MC74HC157Adtr2 tssop?16* 2500 units / reel MC74HC157Adtr2g tssop?16* 2500 units / reel MC74HC157Afel soeiaj?16 2000 units / reel MC74HC157Afelg soeiaj?16 (pb?free) 2000 units / reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *this package is inherently pb?free.
MC74HC157A http://onsemi.com 3 ??????????????????????? ??????????????????????? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? v cc ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 20 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 25 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 50 ??? ??? ???? ? ?? ? ???? p d ?????????????? ? ???????????? ? ?????????????? power dissipation in still air, plastic dip? soic package? tssop package? ????? ? ??? ? ????? 750 500 450 ??? ? ? ? ??? mw ???? ???? ?????????????? ?????????????? ????? ????? ??? ???  c ???? ? ?? ? ???? t l ?????????????? ? ???????????? ? ?????????????? lead temperature, 1 mm from case for 10 seconds (plastic dip, soic or tssop package) ????? ? ??? ? ????? 260 ??? ? ? ? ???  c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. ?derating ? plastic dip: ? 10 mw/  c from 65  to 125  c soic package: ? 7 mw/  c from 65  to 125  c tssop package: ? 6.1 mw/  c from 65  to 125  c for high frequency or heavy load considerations, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). recommended operating conditions ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? v cc ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ? ?? ? ???? v in , v out ?????????????? ? ???????????? ? ?????????????? dc input voltage, output voltage (referenced to gnd) ??? ? ? ? ??? 0 ??? ? ? ? ??? v cc ??? ? ? ? ??? v ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ???  c ???? ? ?? ? ???? t r , t f ?????????????? ? ???????????? ? ?????????????? input rise and fall time v cc = 2.0 v (figure 1) v cc = 4.5 v v cc = 6.0 v ??? ? ? ? ??? 0 0 0 ??? ? ? ? ??? 1000 500 400 ??? ? ? ? ??? ns dc electrical characteristics (voltages referenced to gnd) ???? ???? ????????? ????????? ????????? ????????? ???? ???? ????????? ????????? guaranteed limit ??? ??? ???? ???? ????????? ????????? ????????? ????????? ???? ???? ???? ????  c ??? ???  85  c ???? ????  125  c ??? ??? ???? ? ?? ? ? ?? ? ???? v ih ????????? ? ??????? ? ? ??????? ? ????????? minimum high?level input voltage ????????? ? ??????? ? ? ??????? ? ????????? v out = v cc ? 0.1 v |i out |  20  a ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 1.5 2.1 3.15 4.2 ??? ? ? ? ? ? ? ??? 1.5 2.1 3.15 4.2 ???? ? ?? ? ? ?? ? ???? 1.5 2.1 3.15 4.2 ??? ? ? ? ? ? ? ??? v ???? ? ?? ? ? ?? ? ???? v il ????????? ? ??????? ? ? ??????? ? ????????? maximum low?level input voltage ????????? ? ??????? ? ? ??????? ? ????????? v out = 0.1 v |i out |  20  a ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 0.5 0.9 1.35 1.8 ??? ? ? ? ? ? ? ??? 0.5 0.9 1.35 1.8 ???? ? ?? ? ? ?? ? ???? 0.5 0.9 1.35 1.8 ??? ? ? ? ? ? ? ??? v ???? ? ?? ? ? ?? ? ? ?? ? ???? v oh ????????? ? ??????? ? ? ??????? ? ? ??????? ? ????????? minimum high?level output voltage ????????? ? ??????? ? ????????? v in = v ih |i out |  20  a ???? ? ?? ? ???? 2.0 4.5 6.0 ???? ? ?? ? ???? 1.9 4.4 5.9 ??? ? ? ? ??? 1.9 4.4 5.9 ???? ? ?? ? ???? 1.9 4.4 5.9 ??? ? ? ? ? ? ? ? ? ? ??? v ????????? ? ??????? ? ????????? v in = v ih |i out |  2.4 ma |i out |  6.0 ma |i out |  7.8 ma ???? ? ?? ? ???? 3.0 4.5 6.0 ???? ? ?? ? ???? 2.48 3.98 5.48 ??? ? ? ? ??? 2.34 3.84 5.34 ???? ? ?? ? ???? 2.2 3.7 5.2 ???? ????????? ????????? ???? ???? ??? ???? ???  (v in or v out )  v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
MC74HC157A http://onsemi.com 4 dc electrical characteristics (voltages referenced to gnd) ??? ??? ????????? ????????? guaranteed limit ???? ???? ????????? ????????? ????????? ????????? ???? ???? ??? ??? ???? ????  125  c ??? ???  85  c ???? ????  c ???? ???? ????????? ????????? ????????? ????????? ???? ???? ???? ? ?? ? ? ?? ? ? ?? ? ? ?? ? ???? v ol ????????? ? ??????? ? ? ??????? ? ? ??????? ? ? ??????? ? ????????? maximum low?level output voltage ????????? ? ??????? ? ????????? v in = v il |i out |  20  a ???? ? ?? ? ???? 2.0 4.5 6.0 ???? ? ?? ? ???? 0.1 0.1 0.1 ??? ? ? ? ??? 0.1 0.1 0.1 ???? ? ?? ? ???? 0.1 0.1 0.1 ??? ? ? ? ? ? ? ? ? ? ? ? ? ??? v ????????? ? ??????? ? ? ??????? ? ????????? v in = v il |i out |  2.4 ma |i out |  6.0 ma |i out |  7.8 ma ???? ? ?? ? ? ?? ? ???? 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 0.26 0.26 0.26 ??? ? ? ? ? ? ? ??? 0.33 0.33 0.33 ???? ? ?? ? ? ?? ? ???? 0.4 0.4 0.4 ???? ???? ????????? ????????? ????????? ????????? ???? ???? ???? ???? 0.1 ??? ??? 1.0 ???? ???? 1.0 ??? ???  a ???? ? ?? ? ???? i oz ????????? ? ??????? ? ????????? maximum three?state leakage current ????????? ? ??????? ? ????????? output in high?impedance state v in = v il or v ih v out = v cc or gnd ???? ? ?? ? ???? 6.0 ???? ? ?? ? ???? 0.5 ??? ? ? ? ??? 5.0 ???? ? ?? ? ???? 10 ??? ? ? ? ???  a ???? ???? ????????? ????????? ????????? ?????????  a ???? ???? ???? ???? ??? ??? ???? ???? ??? ???  a note: information on typical parametric values can be found in chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). ac electrical characteristics (c l = 50 pf, input t r = t f = 6.0 ns) ???? ? ?? ? ? ?? ? ???? symbo l ????????????????? ? ??????????????? ? ? ??????????????? ? ????????????????? parameter ???? ? ?? ? ? ?? ? ???? v cc v ????????? ????????? ??? ? ? ? ? ? ? ??? unit ???? ? ?? ? ???? ? 55 to 25  c ??? ? ? ? ???  85  c ???? ? ?? ? ????  125  c ???? ? ?? ? ? ?? ? ???? t plh , t phl ????????????????? ? ??????????????? ? ? ??????????????? ? ????????????????? maximum propagation delay, input a or b to output y (figures 1 and 4) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 105 65 21 18 ??? ? ? ? ? ? ? ??? 130 85 26 22 ???? ? ?? ? ? ?? ? ???? 160 115 32 27 ??? ? ? ? ? ? ? ??? ns ???? ? ?? ? ? ?? ? ???? t plh , t phl ????????????????? ? ??????????????? ? ? ??????????????? ? ????????????????? maximum propagation delay, select to output y (figures 2 and 4) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 110 70 22 19 ??? ? ? ? ? ? ? ??? 140 90 28 24 ???? ? ?? ? ? ?? ? ???? 165 115 33 28 ??? ? ? ? ? ? ? ??? ns ???? ? ?? ? ? ?? ? ???? t plh , t phl ????????????????? ? ??????????????? ? ? ??????????????? ? ????????????????? maximum propagation delay, output enable to output y (figures 3 and 4) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 100 60 20 17 ??? ? ? ? ? ? ? ??? 125 80 25 21 ???? ? ?? ? ? ?? ? ???? 150 110 30 26 ??? ? ? ? ? ? ? ??? ns ???? ? ?? ? ? ?? ? ???? t tlh , t thl ????????????????? ? ??????????????? ? ? ??????????????? ? ????????????????? maximum output transition time, any output (figures 1 and 4) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 75 27 15 13 ??? ? ? ? ? ? ? ??? 95 32 19 16 ???? ? ?? ? ? ?? ? ???? 110 36 22 19 ??? ? ? ? ? ? ? ??? ns ???? ???? ????????????????? ????????????????? ???? ???? ???? ???? ??? ??? ???? ???? ??? ??? typical @ 25 c, v cc = 5.0 v pf 33 * used to determine the no?load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc . for load considerations, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d).
MC74HC157A http://onsemi.com 5 pin descriptions inputs a0, a1, a2, a3 (pins 2, 5, 11, 14) nibble a inputs. the data present on these pins is transferred to the outputs when the select input is at a low level and the output enable input is at a low level. the data is presented to the outputs in noninverted form. b0, b1, b2, b3 (pins 3, 6, 10, 13) nibble b inputs. the data present on these pins is transferred to the outputs when the select input is at a high level and the output enable input is at a low level. the data is presented to the outputs in noninverted form. outputs y0, y1, y2, y3 (pins 4, 7, 9, 12) data outputs. the selected input nibble is presented at these outputs when the output enable input is at a low level. the data present on these pins is in its noninverted form. for the output enable input at a high level, the outputs are at a low level. control inputs select (pin 1) nibble select. this input determines the data word to be transferred to the outputs. a low level on this input selects the a inputs and a high level selects the b inputs. output enable (pin 15) output enable input. a low level on this input allows the selected input data to be presented at the outputs. a high level on this input sets all outputs to a low level. switching waveforms input a or b output enable t plh t phl t r t f v cc gnd t thl t tlh 10% 50% 90% 10% 50% 90% output y *includes all probe and jig capacitance c l * test point device under test output t r t f v cc gnd output y t phl t plh 10% 50% 90% 10% 50% 90% t tlh t thl t r t f v cc gnd select output y t phl t plh t tlh t thl 10% 50% 90% 10% 50% 90% figure 3. hc157a figure 4. y versus selected, noninverted figure 5. hc157a figure 6. test circuit
MC74HC157A http://onsemi.com 6 expanded logic diagram 4 7 9 12 2 3 5 6 11 10 14 13 15 1 a0 b0 a1 b1 a2 b2 a3 b3 y0 y1 y2 y3 output enable select data outputs nibble outputs
MC74HC157A http://onsemi.com 7 package dimensions pdip?16 n suffix case 648?08 issue t soic?16 d suffix case 751b?05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. ?a? b f c s h g d j l m 16 pl seating 18 9 16 k plane ?t? m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01     notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45  g 8 pl p ?b? ?a? m 0.25 (0.010) b s ?t? d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019 
MC74HC157A http://onsemi.com 8 package dimensions tssop?16 dt suffix case 948f?01 issue a ??? ??? ??? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ?w?.  section n?n seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ?t? ?v? ?w? 0.25 (0.010) 16x ref k n n
MC74HC157A http://onsemi.com 9 package dimensions soeiaj?16 f suffix case 966?01 issue o h e a 1 dim min max min max inches ??? 2.05 ??? 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 ??? 0.78 ??? 0.031 a 1 h e q 1 l e  10  0  10  l e q 1  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z
MC74HC157A http://onsemi.com 10 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 MC74HC157A/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.


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